iNEXT

iNEXT is a multi-FPGA board with host interface through PCI-Express and USB 2.0 to provide hardware engineers with modeling and debugging toolkit in addition to accelerating functionality, it has C/C++ API, Verilog PLI/VPI, and VHDL VHPI for easy-to-use test-bench development. The iNEXT supports PC Windows and Linux, up to four Xilinx Virtex-5 LX330, and various memories including DDR2, SDRAM, SRAM, and Flash.

iNEXT enables multi-FPGA users to verify their designs in a much more efficient and versatile way than conventional FPGA-based verification schemes. iNEXT adopts PCI-Express and USB 2.0 interfacing for higher hardware performance and provides C-interface and Verilog/VHDL-interfacing in the form of API for testing and HW/SW co-simulation purposes. iNEXT also has GPIO to support user’s custom board. iNEXT supports de facto standards including PLI, VPI, VHPI, and SystemC and as a result iNEXT will be a cost effective accelerator and verification solution for larger size of HDL design. iNEXT has a number of options in gate count of up to 132 million gates.

iNEXT provides a number of invaluable features, which enable designers to test/verify and debug their design while the application program is running on the host computer and the design is running in FPGAs inside of iNEXT hardware. These features include interfacing, debugging and the external connection.

  • Interfacing features
    • C/C++ API enables designers to develop their testbench using high-level languages.
    • HDL PLI/FLI enables designers to use their HDL simulation environment with a minor modification.
    • Generalized interfacing mechanism between SW simulation and HW emulation provides HW-SW co-development, where the former runs in the host computer and the latter runs in the iNEXT hardware.
  • Debugging features
    • Built-In-logic-Analyzer (BILA) is embedded in iNEXT. Using this feature, users can observe signals in the DUT that is mapped into FPGA of iNEXT.
  • External connection features
    • A Data Pumping Port (DPP) enables the DUT to send and/or receive data.

Using the features of iNEXT, a wide range of applications is possible as follows.

  • Chip design: Blocks/modules to be tested can be easily verified with remaining blocks in various formats, e.g., C/C++/HDL/EDIF and other already verified IP blocks can be simulated.
  • IP development: A wider freedom of testbench development is possible and the hardware prototyping can be possible to deliver highly reliable IP’s.
  • Device driver development: Hardware prototype is available prior to getting a real chip.
  • PCI-express card development: A pilot hardware prototype board can be easily developed on the PCI-express interface, i.e, iNEXTBaseBoard.
  • HW/SW co-verification: Software models on the host computer can be co-simulated with hardware prototype in iNEXT.
  • General testbench environment: iNEXT API/PLI/FLI provides a wider range of freedom to develop testbench.
  • Hardware acceleration: The DUT in the iNEXT hardware is likely to run faster than software simulation.
  • In-system verification: The DPP provides a mechanism to connect external devices.

iNEXT’s software package provides a device driver for following Operating Systems.

  • Microsoft Windows 2000
  • Microsoft Windows XP
  • Linux

As iNEXT utilizes FPGA, HDL synthesizers and P&R software tools are required. The following HDL synthesizers can be used for iNEXT.

  • Synopsys’ Design Compiler with feature of FPGA Compiler
  • Synopsys’ FPGA Compiler II
  • Mentor Graphics’ Leonardo Spectrum
  • Synplicity’s Synplify Pro
  • Xilinx’ XST

While iNEXT accommodates DUT in its hardware, the host computer runs testbench or remaining blocks of user design. An HDL simulator and/or C/C++ compiler are needed depending on the testbench. When the testbench or remaining block is written in HDLs, the following software simulators can be used.

  • Model Technology (Mentor Graphics) ModelSim PE/SE/XE/AE

Generally speaking, iNEXT software package includes PLI library for Verilog and FLI library for VHDL so that any HDL simulators can be run with iNEXT. When the testbench is written in C/C++, the following C/C++ compilers can be used, but not limited to.

  • Microsoft Visual Studio 6.0 Visual C++
  • Borland C++ Builder 6.0 (will be supported shortly)
  • Borland C++ 5.5
  • GNU gcc with Cygwin

iNEXT follows an open interfacing paradigm, meaning that iNEXT does not limit users to interface any possible computers and software tools. To support this paradigm, Dynalith Systems will add more compatible tools. From the users’ point of view, iNEXT is based on APIs including PLI and FLI. As a result, users can easily build their own interfaces on top of the APIs. To demonstrate this approach, the following de facto standards are supported or will be supported.

  • SCE-API/MI from Accellera Interfaces Technical Committee
  • SystemC from Open SystemC Initiative
  • TestBuilder from Cadence Design Systems
  • OpenVera from Synopsys

iNEXT can accommodate two FPGA boards and each FPGA board contains two FPGAs and memories. iNEXT is controlled by the host computer via USB 2.0 or PCI-Express, through which the FPGA is configured on-the-fly and designs in the FPGA are run along with the program in the host computer.

Host computer
OS Windows or Linux
Interface USB 2.0 or PCI-Express x1
FPGA
FPGA Xilinx Virtex-5 LX 33Million version
Per board Two FPGAs
Per system Four FPGAs
On-board memories
SSRAM 4M~8MByte (32-bit width) per FPGA
DDR2 128Mbyte (32-bit width) per FPGA
SDRAM SoDIMM connector per FPGA(up to 512MB, 64-bit)
FLASH 8MByte (32-bit width) per board
Inter-FPGA connection
Neighbor FPGA 288
Up/down FPGA 280
Diagonal FPGA 100
BILA (Built-In Logic Analyzer)
Memory SRAM, SDRAM, DDR2 SDRAM
External connection
Pin count 157 user pins per board including 2 single-ended clock input
Per system 314 user pins per system
 

Copyright 2003-2009 (c) Dynalith Systems Co., Ltd. All rights are reserved.